The present invention relates to a nickel alloy sputtering target enabling the formation of a thermally stable nickel silicide (NiSi) film, having favorable plastic workability to the target, and which is particularly effective in the production of a gate electrode material (thin film), as well as to a nickel silicide film formed with such a target.
In recent years, the use of a NiSi film in the salicide process as the gate electrode material is paid attention. Nickel, compared to cobalt, is characterized in that it is capable of forming a silicide film with less consumption of silicon during the salicide process. Further, NiSi, as with a cobalt silicide film, is characterized in that the increase of fine wire resistance pursuant to the refinement of wiring scarcely occurs.
In light of the above, nickel is being used in substitute of the expensive cobalt as the gate electrode material. Nevertheless, in the case of NiSi, it is easily subject to a phase transition to a more stable phase of NiSi2, and there is a problem of the boundary roughness becoming aggravated and highly resistive. Moreover, there are other problems in that the film is easily aggregated and excessive formation of silicides often occurs.
Conventionally, as technology of using a nickel silicide film or the like, there is technology of capping and annealing a metal compound film such as TiN on a Ni or Co film to prevent the formation of an insulation film by reacting with oxygen at the time of forming the silicide film. Here, TiN is used to prevent the formation of an irregular insulation film by the reaction of oxygen and Ni.
When the irregularities are small, since the length from the NiSi film to the bonding of the source/drain diffusion layer will be long, it is said that the bonding leak can be inhibited. In addition, TiC, TiW, TiB, WB2, WC, BN, AlN, Mg3N2, CaN, Ge3N4, TaN, TbNi2, VB2, VC, ZrN, ZrB and the like are also disclosed as the cap film (refer to Patent Document 1).
Further, with conventional technology, problems have been pointed out in that NiSi is easily oxidized even within the silicide material, large irregularities are formed on the boundary area of the NiSi film and Si substrate, and a bonding leak will occur.
Here, a solution has been taken that sputtering a TiN film on the Ni film as a cap film, and subjecting this to heat treatment is to nitride the surface of the NiSi film. This aims to prevent the NiSi from oxidizing, and suppress the formation of irregularities. Nevertheless, since the nitride film on the NiSi formed by accumulating TiN on Ni is thin, a problem remains in that it is difficult to maintain the barrier properties for a long period of time.
Thus, a solution has been taken that forming the silicide film under a mixed gas (2.5 to 10%) atmosphere with nitrogen gas added thereto is to make the roughness of the silicide film 40 nm or less, and the grain size 200 nm or more. Here, it is desirable to cap one among Ti, W, TiNx and WNx on Ni.
Here, it is also described sputtering Ni with only argon gas that is free of nitrogen gas, subsequently sputtering the cap film of TiN, and thereafter injecting N ions into the Ni film to add N into the Ni film (refer to Patent Document 2).
Further, as conventional technology, a semiconductor device and the manufacturing method are disclosed, and the combination of primary metals such as Co, Ni, Pt or Pd and secondary metals such as Ti, Zr, Hf, V, Nb, Ta or Cr is described. The Examples use the Co—Ti combination.
Cobalt has a lower capability of reducing the silicon oxide film compared to titanium, and the silicide reaction will be inhibited if there is a natural oxide film existing on the silicon substrate or polysilicon film surface upon depositing cobalt. Further, the heat resistance properties are inferior to a titanium silicide film, and problems have been pointed out in that the heat upon depositing the silicon oxide film as the interlayer film after the completion of the salicide process causes the cobalt disilicide (CoSi2) film to aggregate and the resistance to increase (refer to Patent Document 3).
Further, as conventional technology, there is a disclosure of a “manufacturing method of a semiconductor device,” and technology is described for where an amorphous alloy layer with a metal selected from a group consisting of titanium, zirconium, tantalum, molybdenum, niobium, hafnium, and tungsten is formed on cobalt or nickel to prevent the short-circuit caused by the overgrowth upon forming salicide. Here, although there are Examples that show a cobalt content of 50 to 75 at % and Ni 40, Zr 60, the alloy content is large for making an amorphous film (refer to Patent Document 4).
As described above, all of the disclosed conventional technologies relate to the deposition process, and do not relate to a sputtering target. Further, with the conventional high purity nickel, the purity was roughly up to 4N excluding gas components, and the oxygen content was high at roughly 100 ppm. As a result of producing a nickel alloy target based on this kind of conventional nickel, plastic workability was inferior and it was not possible to produce a high quality target. In addition, there was a problem in that numerous particles were generated during sputtering, and the uniformity was inferior.
In light of the problems of the foregoing gate electrode material, the present inventors developed a sputtering target material in which titanium or platinum is added to nickel as a particularly superior material, and proposed the inhibition of the phase transition to NiSi2 as the stable phase (refer to Patent Document 5 and Patent Document 6).
In this proposal, the nickel alloy added with platinum was the most effective and extremely useful at the point such proposal was made, but in recent years the rise in the processing temperature is becoming unavoidable pursuant to the reduction of the wiring width in recent years, and thermal stability at even higher temperatures is being demanded.
[Prior Art Documents]    [Patent Document 1] Japanese Patent Published Unexamined Application No. H7-38104    [Patent Document 2] Japanese Patent Published Unexamined Application No. H9-153616[Patent Document 3] Japanese Patent Published Unexamined Application No. H11-204791 (U.S. Pat. No. 5,989,988)    [Patent Document 4] Japanese Patent Published Unexamined Application No. H5-94966    [Patent Document 5] Japanese Patent Published Unexamined Application No. 2003-213406    [Patent Document 6] Japanese Patent Published Unexamined Application No. 2003-213406